RAM
In American laboratories of the 1960s, a glaring contradiction tormented engineers. On one hand, they were miniaturizing logic components down to the size of a small pea. On the other, they retained magnetic-core memory systems as large as barrels. These devices inherited from the 1950s worked marvelously, but their bulk was grotesque compared to the progress in integration.
Bob Norman of Fairchild Semiconductor sought a way out as early as 1961. He envisioned integrating several flip-flop circuits on a silicon chip, with each element storing one bit of information. The idea looked good on paper, but the technology refused to cooperate. Fairchild’s management shelved the project, deeming it unfeasible. However, Texas Instruments delivered a small computer to the US Air Force equipped with a few hundred bits of semiconductor memory. This demonstration proved the concept had legs, at small or large scale. IBM sensed the potential and published an ambitious report in 1965 titled Potential for Monolithic Megabit Memories. The company pushed experimentation by developing a 16-bit chip for the System/360 Model 95, a machine specifically designed for NASA’s needs in 1966.
Tom Longo turned the tables the following year. With his team at Transitron, he developed the first commercial multi-cell memory chip. These 16 bits exploited TTL technology and immediately found buyers at Honeywell. The success prompted Fairchild and Texas Instruments to develop their own versions.
From IBM’s laboratories, Robert Dennard revolutionized the approach in 1966. He invented the single-transistor DRAM cell, a technical feat that radically simplified memory architecture. Existing SRAM cells required multiple transistors per stored bit. This innovation paved the way for modern DRAM memories.
Fairchild revived its ambitions in 1967 with the SAM (Semiconductor Advanced Memory) program. The goal was to produce a 64-bit chip. The following year, manufacturers offered TTL memories of this capacity, organized into 16 words of 4 bits each, with access times reaching 60 nanoseconds.
Radiation Inc., future Harris Semiconductor, introduced PROM (Programmable Read-Only Memory) in 1969. These user-programmable components appealed to computer developers. They allowed microcode modification during debugging phases, an unprecedented flexibility that accelerated system development.
In 1970 with the Intel 1103, William Regitz and Joel Karp, supported by Ted Hoff and Ted Rowe, developed the first commercially viable DRAM. This 1,024-bit chip still suffered from limitations in speed and ease of use, but it definitively proved that semiconductor memories could equip computers.
Dov Frohman made a strong impact the following year with the Intel 1702, the first EPROM memory. This invention exploited a floating-gate technique conceived at Bell Labs. The principle: electrically program the memory and erase it by exposure to ultraviolet light through a small quartz window built into the package.
Bob Proebsting of Mostek changed the rules in 1973. His MK 4096 offered 4 Kbit in a package of only 16 pins thanks to a clever multiplexed addressing technique. This approach influenced all subsequent generations of DRAM, like an industry standard.
The capacity race accelerated. The 16 Kbit chips arrived in 1976, exploiting dual-layer polysilicon technology that optimized the arrangement of memory cells. The 64 Kbit followed in 1979, then the 256 Kbit in 1982. Each generation brought its share of technological innovations and pushed the limits of miniaturization.
In 1983, Intel struck hard with the first 1 Mbit CMOS DRAM. This technological transition to CMOS outlined the sector’s future. Paradoxically, Intel soon abandoned the DRAM market, leaving the field open to its Japanese and Korean competitors who rushed into the breach.
Innovation continued with the 1 Mbit chips in 1986. These components inaugurated the use of non-planar memory cells, stacked or trenched to save space. Capacities climbed relentlessly: 4 Mbit in 1988, 16 Mbit in 1991, 64 Mbit in 1994. Each technological leap came with increasingly formidable manufacturing constraints.
The year 1998 saw the birth of 256 Mbit DRAMs that introduced high-permittivity dielectrics. This material innovation allowed the continuation of miniaturization while maintaining the electrical properties necessary for proper memory cell operation.
This frantic race for performance followed Moore’s Law with striking regularity. The doubling of capacities approximately every two years was accompanied by a vertiginous drop in cost per stored bit. This economic democratization propelled random-access memories into all electronic devices, from personal computers to mobile phones.