Intel i960
Intel delivered a major blow in September 1989 with the launch of the i960CA, its first 32-bit superscalar processor dedicated to embedded systems. This chip marked a breakthrough in the embedded computing world by executing instructions simultaneously on each clock cycle. The result came quickly with 66 MIPS, a figure that caused a sensation at the time.
The philosophy behind the i960 surprised with its boldness. Intel married the traditional RISC core with its 32 registers to an enriched instruction set that borrowed from the CISC world. This genre-mixing, far from being a shaky compromise, responded precisely to the particular constraints of embedded applications. Intel's engineers knew how to balance this hybridization to create a processor that draws the best from both worlds.
The family expanded, the i960CF succeeded the CA and doubled its performance thanks to a redesigned cache memory. Intel then declined its creation according to a well-established commercial logic: the SA/SB for tight budgets, the KA/KB for the mid-range, and the hardened MC versions for military applications. This product line strategy testified to a mature industrial approach.
Under the hood, innovations abounded. The interrupt controller didn't just manage priorities, it did so autonomously. Local registers saved themselves without intervention during subroutine calls, eliminating a traditional source of latency. Instruction caches equipped all models, while certain versions benefited from data caches that accelerated repetitive processing.
Data transfers reached 160 MB per second on high-performance buses, a remarkable speed. This capability transformed information flow management in demanding applications. Object code compatibility between different models constituted a major asset: developers could migrate their applications without starting from scratch, a guarantee of sustainability that was appreciated.
Integration pushed innovation further. The VH model brought together on a single chip a 32-bit PCI v2.1 interface at 33 MHz, a memory controller, and various peripheral functionalities. This concentration reduced costs, footprint, and consumption, three critical parameters in embedded systems.
The i960's application domains drew an impressive map. Networks adopted it for their communication controllers, bridges, and routers. Medical imaging, particularly ultrasound, exploited its processing capabilities. Industrial automation, robotics, and computer vision found an excellent ally in this processor. The aerospace sector integrated it into its flight control equipment and satellite navigation systems.
Intel didn't limit itself to silicon. The Solutions960 program federated more than 200 tools developed by 70 partner companies. Optimized compilers, operating systems, debugging tools, evaluation boards: the ecosystem took shape around the processor. This software richness transformed i960 adoption into a smooth experience for developers.
The integrated DMA controller impressed with its performance: 59 MB/s in fly-by transfers, 32 MB/s in two-cycle transfers. The interrupt controller managed up to 248 external sources with 32 programmable priority levels. Lockable cache memory guaranteed optimal execution of critical algorithms, a valuable feature in real-time systems.
Specialization guided the development of different versions. Network models processed packets without saturation, while those dedicated to imaging adapted to different bus widths and data conventions. This targeted approach reinforced processor attractiveness according to their application domain.
Superscalar execution became democratized, peripheral integration on the main chip became the norm, the importance of a complete development ecosystem remains relevant. The late 1990s saw the birth of new competing architectures that disrupted the landscape. The i960 nevertheless paved the way toward increasingly integrated and high-performance solutions.